We propose a fast data relay (FDR) mechanism to enhance existing CGRA (coarse-grained reconfigurable architecture). FDR\r\ncan not only provide multicycle data transmission in concurrent with computations but also convert resource-demanding\r\ninter-processing-element global data accesses into local data accesses to avoid communication congestion. We also propose\r\nthe supporting compiler techniques that can efficiently utilize the FDR feature to achieve higher performance for a variety of\r\napplications. Our results on FDR-based CGRA are compared with two other works in this field: ADRES and RCP. Experimental\r\nresults for various multimedia applications show that FDR combined with the new compiler deliver up to 29% and 21% higher\r\nperformance than ADRES and RCP, respectively.
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